Krishnaswamy. (2013). Design, Analysis and Test of Logic Circuits Under Uncertainty (1.). Springer Netherlands.
Citação norma ChicagoKrishnaswamy. Design, Analysis and Test of Logic Circuits Under Uncertainty. 1. Springer Netherlands, 2013.
Citação norma MLAKrishnaswamy. Design, Analysis and Test of Logic Circuits Under Uncertainty. 1. Springer Netherlands, 2013.
Nota: a formatação da citação pode não corresponder 100% ao definido pela respectiva norma.