Low complexity routing algorithm for rearrangeable switching networks

Low complexity routing algorithm for rearrangeable switching networks

This conference paper was presented in the 27th IEEE International Conference on Advanced Information Networking and Applications, AINA 2013; Barcelona; Spain; 25 March 2013 through 28 March 2013 [© 2013 IEEE] The conference paper's definite version is available at: http://dx.doi.org/110.1109/A...

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Egile Nagusiak: Chakrabarty, Amitabha, Collier, Martin J.
Beste egile batzuk: Department of Computer Science and Engineering, BRAC University
Formatua: Conference paper
Hizkuntza:English
Argitaratua: © 2013 IEEE 2016
Gaiak:
Complexity
Interconnection networks
Permutation
Rearrangeable networks
Routing tags
Sarrera elektronikoa:http://hdl.handle.net/10361/7309
http://dx.doi.org/110.1109/AINA.2013.55
id 10361-7309
record_format dspace
spelling 10361-73092018-07-25T10:27:58Z Low complexity routing algorithm for rearrangeable switching networks Chakrabarty, Amitabha Collier, Martin J. Department of Computer Science and Engineering, BRAC University Complexity Interconnection networks Permutation Rearrangeable networks Routing tags This conference paper was presented in the 27th IEEE International Conference on Advanced Information Networking and Applications, AINA 2013; Barcelona; Spain; 25 March 2013 through 28 March 2013 [© 2013 IEEE] The conference paper's definite version is available at: http://dx.doi.org/110.1109/AINA.2013.55 For a long time among the research community. Routing algorithms for this class of networks have attracted lots of researchers along with other related areas, such as modification of the networks structure, crosspoints reduction etc. In this paper a new routing algorithm is presented for symmetric rearrangeable networks built with 2 × 2 switching element. A new matrix based abstraction model is derived to determine conflict free routing paths for each input-output request. Each stage of a network is mapped into a set of sub-matrices and number of matrices in each stage correspond to number of subnetworks in that stage. Once the input permutation is given, matrix cells are populated with binary values depending on the position of the switching elements in the actual hardware and their mapped matrix cells. These binary values control the routing decision in the underlying hardware. This new routing algorithm is capable of connection setup for partial permutation, m = ρN, where N is the total input numbers and m is the number of active inputs. Overall the serial time complexity of this method is O(NlogN)1 and Ο(mlogN) where all N inputs are active and with m < N active inputs respectively. The time complexity of this routing algorithm in a parallel machine with N completely connected processors is Ο(log2N). With m active requests the time complexity goes down to Ο(logmlogN), which is better than the O(log2m + logN), reported in the literature for 21/2 [(log2N-4logN)1/2-logN] ≤ ρ ≤ 1. Later half of this paper demonstrates how this routing algorithm is applicable for crosstalk free routing in optical domain. Published 2016-12-21T06:57:49Z 2016-12-21T06:57:49Z 2013-03 Conference paper Chakrabarty, A., & Collier, M. (2013). Low complexity routing algorithm for rearrangeable switching networks. Paper presented at the Proceedings - International Conference on Advanced Information Networking and Applications, AINA, 145-152. doi:10.1109/AINA.2013.55 1550445X http://hdl.handle.net/10361/7309 http://dx.doi.org/110.1109/AINA.2013.55 en © 2013 IEEE
institution Brac University
collection Institutional Repository
language English
topic Complexity
Interconnection networks
Permutation
Rearrangeable networks
Routing tags
spellingShingle Complexity
Interconnection networks
Permutation
Rearrangeable networks
Routing tags
Chakrabarty, Amitabha
Collier, Martin J.
Low complexity routing algorithm for rearrangeable switching networks
description This conference paper was presented in the 27th IEEE International Conference on Advanced Information Networking and Applications, AINA 2013; Barcelona; Spain; 25 March 2013 through 28 March 2013 [© 2013 IEEE] The conference paper's definite version is available at: http://dx.doi.org/110.1109/AINA.2013.55
author2 Department of Computer Science and Engineering, BRAC University
author_facet Department of Computer Science and Engineering, BRAC University
Chakrabarty, Amitabha
Collier, Martin J.
format Conference paper
author Chakrabarty, Amitabha
Collier, Martin J.
author_sort Chakrabarty, Amitabha
title Low complexity routing algorithm for rearrangeable switching networks
title_short Low complexity routing algorithm for rearrangeable switching networks
title_full Low complexity routing algorithm for rearrangeable switching networks
title_fullStr Low complexity routing algorithm for rearrangeable switching networks
title_full_unstemmed Low complexity routing algorithm for rearrangeable switching networks
title_sort low complexity routing algorithm for rearrangeable switching networks
publisher © 2013 IEEE
publishDate 2016
url http://hdl.handle.net/10361/7309
http://dx.doi.org/110.1109/AINA.2013.55
work_keys_str_mv AT chakrabartyamitabha lowcomplexityroutingalgorithmforrearrangeableswitchingnetworks
AT colliermartinj lowcomplexityroutingalgorithmforrearrangeableswitchingnetworks
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