Hardware architecture design of face recognition system based on FPGA

Hardware architecture design of face recognition system based on FPGA

This conference paper was presented in the 2nd IEEE International Conference on Innovations in Information, Embedded and Communication Systems, ICIIECS 2015; Karpagam College of EngineeringCoimbatore; India; 19 March 2015 through 20 March 2015 [© 2015 Institute of Electrical and Electronics Engineer...

תיאור מלא

מידע ביבליוגרפי
Main Authors: Mondol, Raktim Kumar, Khan, Muhammadimran, Mahbubul, Hye, A. K., Hassan, Asif S.
מחברים אחרים: Department of Electrical and Electronic Engineering
פורמט: Conference Paper
שפה:English
יצא לאור: © 2015 Institute of Electrical and Electronics Engineers Inc. 2016
נושאים:
DSP Algorithm
Face Recognition
FFT
Field Programmable Gate Array (FPGA)
Image Processing
PCA
VLSI
גישה מקוונת:http://hdl.handle.net/10361/6978

אינטרנט

http://hdl.handle.net/10361/6978

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