Hardware architecture design of face recognition system based on FPGA

Hardware architecture design of face recognition system based on FPGA

This conference paper was presented in the 2nd IEEE International Conference on Innovations in Information, Embedded and Communication Systems, ICIIECS 2015; Karpagam College of EngineeringCoimbatore; India; 19 March 2015 through 20 March 2015 [© 2015 Institute of Electrical and Electronics Engineer...

وصف كامل

التفاصيل البيبلوغرافية
المؤلفون الرئيسيون: Mondol, Raktim Kumar, Khan, Muhammadimran, Mahbubul, Hye, A. K., Hassan, Asif S.
مؤلفون آخرون: Department of Electrical and Electronic Engineering
التنسيق: Conference Paper
اللغة:English
منشور في: © 2015 Institute of Electrical and Electronics Engineers Inc. 2016
الموضوعات:
DSP Algorithm
Face Recognition
FFT
Field Programmable Gate Array (FPGA)
Image Processing
PCA
VLSI
الوصول للمادة أونلاين:http://hdl.handle.net/10361/6978

الانترنت

http://hdl.handle.net/10361/6978

مواد مشابهة