Duper scalar processor : the hardware approach to instruction level parallelism

This thesis report is submitted in partial fulfillment of the requirements for the degree of Bachelor of Science in Computer Science and Engineering, 2007.

Bibliographische Detailangaben
1. Verfasser: Sadekin, Intekhab
Weitere Verfasser: Department of Computer Science and Engineering, BRAC University
Format: Abschlussarbeit
Sprache:English
Veröffentlicht: BRAC University 2010
Schlagworte:
Online Zugang:http://hdl.handle.net/10361/381