Sadekin, I., & Department of Computer Science and Engineering, B. U. (2010). Duper scalar processor: The hardware approach to instruction level parallelism. BRAC University.
Чикаго стиль цитування (17-те видання)Sadekin, Intekhab, та BRAC University Department of Computer Science and Engineering. Duper Scalar Processor: The Hardware Approach to Instruction Level Parallelism. BRAC University, 2010.
Стиль цитування MLA (8-ме видання)Sadekin, Intekhab, та BRAC University Department of Computer Science and Engineering. Duper Scalar Processor: The Hardware Approach to Instruction Level Parallelism. BRAC University, 2010.
Попередження: стилі цитування не завжди правильні на всі 100%.