Sadekin, I., & Department of Computer Science and Engineering, B. U. (2010). Duper scalar processor: The hardware approach to instruction level parallelism. BRAC University.
Dyfyniad Arddull ChicagoSadekin, Intekhab, and BRAC University Department of Computer Science and Engineering. Duper Scalar Processor: The Hardware Approach to Instruction Level Parallelism. BRAC University, 2010.
Dyfyniad MLASadekin, Intekhab, and BRAC University Department of Computer Science and Engineering. Duper Scalar Processor: The Hardware Approach to Instruction Level Parallelism. BRAC University, 2010.
Rhybudd: Mae'n bosib nad yw'r dyfyniadau hyn bob amser yn 100% cywir.