Sadekin, I., & Department of Computer Science and Engineering, B. U. (2010). Duper scalar processor: The hardware approach to instruction level parallelism. BRAC University.
Cita Chicago (17th ed.)Sadekin, Intekhab, i BRAC University Department of Computer Science and Engineering. Duper Scalar Processor: The Hardware Approach to Instruction Level Parallelism. BRAC University, 2010.
Cita MLA (8th ed.)Sadekin, Intekhab, i BRAC University Department of Computer Science and Engineering. Duper Scalar Processor: The Hardware Approach to Instruction Level Parallelism. BRAC University, 2010.
Atenció: Aquestes cites poden no estar 100% correctes.