Design and VLSI implementation of high performance face recognition system

This thesis report is submitted in partial fulfillment of the requirements for the degree of Bachelor of Science in Electrical and Electronic Engineering, 2013.

Dettagli Bibliografici
Autori principali:	Dewan, Priyanka Das, Shamma, Tasnim Harun, Abbas, Afifa, Mondol, Raktim Kumar
Altri autori:	Harun-Ur-Rashid, A. B. M
Natura:	Tesi
Lingua:	English
Pubblicazione:	BRAC University 2013
Soggetti:	FFT FPGA FAce Recognition Nios2 TRDB_D5M Electrical and electronic engineering
Accesso online:	http://hdl.handle.net/10361/2503

id	10361-2503
record_format	dspace
spelling	10361-25032019-09-29T05:43:44Z Design and VLSI implementation of high performance face recognition system Dewan, Priyanka Das Shamma, Tasnim Harun Abbas, Afifa Mondol, Raktim Kumar Harun-Ur-Rashid, A. B. M Department of Electrical and Electronic Engineering, BRAC University FFT FPGA FAce Recognition Nios2 TRDB_D5M Electrical and electronic engineering This thesis report is submitted in partial fulfillment of the requirements for the degree of Bachelor of Science in Electrical and Electronic Engineering, 2013. Cataloged from PDF version of thesis report. Includes bibliographical references (page 86-87). In this paper, we have proposed a novel hardware architecture for face-recognition system. In order to make the system cost effective we have used a simple yet efficient algorithm of face-recognition system. We have designed, implemented and verified the algorithm in a cyclone III Field Programmable Gate Array (FPGA) chip. Altera DE0 development board which contains a cyclone III chip on it have been used for debugging purpose. We have also ensured for low power consumption such that the chip could be used universally in a wide range of security systems. To develop a simple yet efficient face recognition algorithm (such as PCA, FFT etc.) on digital hardware, we have researched on various face recognition algorithms using Matlab codes and studied their detection efficiency under various posture and background and also the complexity of the algorithm. To save hardware resource and at the same time to obtain an acceptable level of recognition we have chosen to use Fast Fourier Transform. The search database is developed by taking pictures of BRAC University students in various background and postures and used them to evaluate the developed face recognition system. Images were captured using TRDB_D5M camera module and digital data from the camera was transferred to the SDRAM of the DE0 board using GPIO interface. A NIOS2 microprocessor was synthesized in the cyclone III chip which controlled the total recognition system and the communication between the FFT core, SDRAM and On-chip memory. The performance of the hardware is now under evaluation. Priyanka Das Dewan Tasnim Harun Shamma Afifa Abbas Raktim Kumar Mondol B. Electrical and Electronic Engineering 2013-05-30T06:54:50Z 2013-05-30T06:54:50Z 2013 2013-04 Thesis ID 10221078 ID 09221032 ID 10221073 ID 09221232 http://hdl.handle.net/10361/2503 en BRAC University thesis are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. application/pdf BRAC University
institution	Brac University
collection	Institutional Repository
language	English
topic	FFT FPGA FAce Recognition Nios2 TRDB_D5M Electrical and electronic engineering
spellingShingle	FFT FPGA FAce Recognition Nios2 TRDB_D5M Electrical and electronic engineering Dewan, Priyanka Das Shamma, Tasnim Harun Abbas, Afifa Mondol, Raktim Kumar Design and VLSI implementation of high performance face recognition system
description	This thesis report is submitted in partial fulfillment of the requirements for the degree of Bachelor of Science in Electrical and Electronic Engineering, 2013.
author2	Harun-Ur-Rashid, A. B. M
author_facet	Harun-Ur-Rashid, A. B. M Dewan, Priyanka Das Shamma, Tasnim Harun Abbas, Afifa Mondol, Raktim Kumar
format	Thesis
author	Dewan, Priyanka Das Shamma, Tasnim Harun Abbas, Afifa Mondol, Raktim Kumar
author_sort	Dewan, Priyanka Das
title	Design and VLSI implementation of high performance face recognition system
title_short	Design and VLSI implementation of high performance face recognition system
title_full	Design and VLSI implementation of high performance face recognition system
title_fullStr	Design and VLSI implementation of high performance face recognition system
title_full_unstemmed	Design and VLSI implementation of high performance face recognition system
title_sort	design and vlsi implementation of high performance face recognition system
publisher	BRAC University
publishDate	2013
url	http://hdl.handle.net/10361/2503
work_keys_str_mv	AT dewanpriyankadas designandvlsiimplementationofhighperformancefacerecognitionsystem AT shammatasnimharun designandvlsiimplementationofhighperformancefacerecognitionsystem AT abbasafifa designandvlsiimplementationofhighperformancefacerecognitionsystem AT mondolraktimkumar designandvlsiimplementationofhighperformancefacerecognitionsystem
_version_	1814307516976201728

Design and VLSI implementation of high performance face recognition system

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