000 | 01247nam a2200241 a 4500 | ||
---|---|---|---|
008 | 100518r2009 nju b 001 0 eng d | ||
020 | _a9788131711125 | ||
040 |
_aDLC _cDLC _dBD-DhAAL |
||
082 | 0 | 0 |
_a621.39/5 _222 |
100 | 1 | _aCiletti, Michael D. | |
245 | 1 | 0 |
_aAdvanced digital design with the Verilog HDL / _cMichael D. Ciletti. |
260 |
_aUpper Saddle River, N.J. ; _aNew Delhi : _bPearson Education, _cc2009 [reprinted]. |
||
300 |
_a1004 p. : _bill. ; _c24 cm. |
||
490 | 0 | _aPrentice Hall XILINX design series | |
504 | _aIncludes bibliographical references and index. | ||
650 | 0 |
_aLogic design _xData processing. |
|
650 | 0 | _aVerilog (Computer hardware description language) | |
999 |
_c8641 _d8641 |
||
952 |
_w2010-05-18 _p3010018071 _r2010-05-18 _40 _00 _bBRACUL _10 _o621.39/5 CIL 2009 _d2010-05-18 _t1 _70 _cGEN _2ddc _yBK _aBRACUL |
||
952 |
_w2010-06-17 _p3010018072 _r2010-06-17 _40 _00 _bBRACUL _10 _o621.39/5 CIL 2009 _d2010-06-17 _t2 _70 _2ddc _yBK _aBRACUL |
||
952 |
_w2010-06-17 _p3010018073 _r2010-06-17 _40 _00 _bBRACUL _10 _o621.39/5 CIL 2009 _d2010-06-17 _t3 _70 _cGEN _2ddc _yBK _aBRACUL |